The present invention relates to a direct digital synthesizer (DDS) and, more particularly, to a DDS capable of reducing spurious noise components contained in output signal thereof.
FIG. 1 shows a schematic diagram of a conventional DDS. As shown, a DDS 3C has a phase accumulator 31 which receives a clock signal S1 from a reference frequency oscillator 1 and receives phase increment data (referred to as frequency data hereinafter) of a constant a (1 or greater integer) from a frequency data setting circuit. The phase accumulator 31 has an adder 311 which adds, in synchronism with the clock signal S1, the constant a to phase data S31 delivered from itself. Namely, the adder 311 integrates, or accumulates, the constants a in accordance with the elapse of time, thereby outputting the phase data S31. When the cumulative value of the phase data S31 overflows, i.e., increases above the counting limit of the adder 311, the adder 311 omits a carry bit due to the overflow and then repeats the phase data accumulation. Therefore, the phase data S31 has a saw-tooth waveform and corresponds to a sine signal S33a, which will be described later.
The upper (most significant) bits 31a of the phase data S31 are applied to a phase-to-amplitude converter 32A as an address signal. Generally implemented by a ROM (Read Only Memory), the phase-to-amplitude converter 32A generates waveform data 32a representative of sine-amplitude data. A digital-to-analog (D/A) converter 33A transforms the amplitude data S32 into a sine signal S33a (S3a). When the constant a is 1, the DDS 3C generates the sine signal S3a having a basic frequency f.sub.o. As the constant a changes, the DDS 3C sequentially generates sine signal S3a having a frequency (a.times.f.sub.o). The DDS 3C has been known in the art as an oscillator having a minimum phase noise in the vicinity of carrier frequency and, in addition, being capable of changing frequency rapidly.
However, the prior art DDS has the drawback of spurious noises in its output in accordance with the accumulation operation of the adder 311. The first spurious noise is caused by overflow occurring on the entire bit length of the adder 311 due to residual accumulation. In this case, the residual is derived when offset accumulation overflows. This causative overflow has periodicity associated with the constant a. Since the phase data S31 corresponds to the phase of the sine signal S33a, the causative overflow effects a undesirable instantaneous phase deviation of the signal S33a. Therefore, the sine signal S33a contains spurious noise having frequency reciprocal of the overflow periodicity.
The second spurious noise is caused by overflow occurring when a carry is generated from the lower (lest significant) bit portion, which is not supplied to the phase-to-amplitude converter 32A as the address signal, to the significant bit portion of the address signal. In the DDS, though the least significant bits of the adder 311 are not used for the address signal of the phase-to-amplitude converter 32A, overflow (a carry) due to offset accumulation in the least significant bit portion is applied to the address signal of the converter 32A. This overflow also has periodicity associated with the constant a and causes the spurious noise.
Furthermore, when the offset value is accumulated and the cumulative offset value overflows, residual (high order offset) also remains in accordance with the constant a. Thus, accumulation of this residual produces further overflow. Such overflow also causes a third spurious noise (high order spurious noise).
To reduce the first spurious noise described above, there is a method of adding a pseudorandom number to the least significant bit of the adder, thereby disturbing the periodicity of the overflow. This method is disclosed in U.S. Pat. No. 4,951,237 entitled "DIRECT DIGITAL SYNTHESIZER WITH SELECTABLY RANDOMIZED ACCUMULATOR". However, though this method can reduce the spurious noise, it introduces another spurious noise due to the addition of the pseudorandom number. Another method of reducing spurious noise is also disclosed in U.S. Pat. No. 4,901,265 entitled "PSEUDORANDOM DITHER FOR FREQUENCY SYNTHESIS NOISE". In this method, a small pseudorandom numbers are added to sine amplitude data delivered from a sine converter. However, this method also introduces another spurious noise due to the addition of the pseudorandom number.